搜索资源列表
8bits
- 用Verilog语言模拟的8位优先编码器,可作为课堂作业实用,是完整工程代码-Using Verilog language simulation of the 8 priority encoder, can be used as a classroom operation, is a complete code
Huffman_enc_dec
- Huffman encoder decoder verilog
rsencoder.tar
- RS Encoder RTL verilog Code
hdmi_demo
- hdmi 视频编解码输入输出模块,verilog实现-hdmi encoder and decoder in verilog.
LZSS
- Lempel–Ziv–Storer–Szymanski compression encoder verilog code
HDB3
- 针对数字基带传输系统中HDB3信号的特点,采用基于FPGA的Verilog HDL语言,实现HDB3数字基带信号的编码器设计,共有插V、插B、单双极性变换模块,最终能在FPGA实现。-For digital baseband transmission system HDB3 signal characteristics, based on FPGA Verilog HDL language, designed to achieve HDB3 encoder digital baseband si
bch_dec_enc_dcd
- 关于BCH的编码器和译码器,可实现16位,32位,64位,128位的编码和译码纠错,2位纠错,Verilog实现-On the BCH encoder and decoder, can achieve 16-bit, 32-bit, 64-bit, 128-bit encoding and decoding error correction, 2-bit error correction, Verilog implementation
实验三(1)的指导书
- 8-3优先编码, 1、学会用Verilog语言的描述方式来设计电路; 2、熟悉8—3优先编码器,并用Verilog语言实现其功能; 3、掌握Cyclone系列FPGA的程序加载,熟练掌握将.sof文件加载到实验箱中,实现8—3优先编码器的效果。(8-3 priority coding, 1. Learn to design the circuit with Verilog descr iption; 2. Familiar with 8-3 priority encoder and i
SSI_read
- 使用Verilog 编程语言实现对11 bit 编码器SSI输出的读取(Use Verilog to read encoder,it's 11 bit and SSI output)